4 posts / 0 new
Last post
Rony
Offline
Last seen:4 years 9 months ago
Master
加入:2014-05-15 15:02
UART input FIFO size

The documentation on UART_RBR_THR_DLL_REG states that x number of characters of data may be written to
the THR before the FIFO is full. The number x (default=16) is
determined by the value of FIFO Depth that you set during
configuration.
How can I set it to another value?

RvA
Offline
Last seen:1 day 38 min ago
Staff
加入:2014-02-07 14:10
Hi Rony,

Hi Rony,
不幸的是,FIFO的深度是固定为16 bytes and cannot be changed.
Best regards,
RvA_Dialog

bensalemsaif
Offline
Last seen:3 years 7 months ago
加入:2016-02-02 12:42
Hello MT_Dialog,

Hello MT_Dialog,

In uart2.c file there is the following struct :

/// FIFO_SZ values
enum UART_FIFOSIZE
{
UART_FIFOSIZE_16,
UART_FIFOSIZE_32,
UART_FIFOSIZE_64,
UART_FIFOSIZE_128
};

but it seems not used, why the FIFO size could not be greater than 16 ?

Thanks,

MT_dialog
Offline
Last seen:4 weeks 1 day ago
Staff
加入:2015-06-08 11:34
Hi bensalemsaif,

Hi bensalemsaif,

Its limited by hardware, the two identical UART modules have 16 byte receive and transmit FIFO's. Please check the datasheet paragraph 3.6.1.

Thanks MT_dialog