SDK Ver. 1.0.12.1078
EVK: DA14681 PRO Development kit

我在数据表页159中看到共存架构。
并且我在源代码中添加了以下内容以检查第160页中的情况3:

1。Pmu_ctrl_reg [peri_sleep] = 0。
CLK_RADIO_REG[RFCU_EN]位必须在编程块寄存器之前被断言。
4. Pxy_MODE_REG[PID] = 48 or 49 (COEX_EXT_ACT0 or COEX_EXT_ACT1)，
。5. SMART_ACT (Pxy_MODE_REG[PID] = 50)
。6. SMART_PRI (Pxy_MODE_REG[PID] = 51)
。COEX_CTRL_REG[SMART_ACT_IMPL] = 1

我将源代码添加到示例(rf_tools_cli)。< / p > < p > c < / p > < p >静态孔隙system_init (void * pvParameters) < br / > {< br /> ................< / p > < p > REG_CLR_BIT (CRG_TOP, PMU_CTRL_REG PERIPH_SLEEP); < br / > REG_SET_BIT (CRG_TOP, CLK_RADIO_REG RFCU_ENABLE); < / p > < p > hw_coex_config_reset (); < / p > < p > REG_SET_BIT (COEX, COEX_CTRL_REG SMART_ACT_IMPL); < / p > < p > hw_gpio_set_pin_function (HW_GPIO_PORT_3, HW_GPIO_PIN_0, HW_GPIO_MODE_INPUT_PULLDOWN HW_GPIO_FUNC_COEX_EXT_ACT0); < br / > hw_gpio_set_pin_function (HW_GPIO_PORT_3, HW_GPIO_PIN_1, HW_GPIO_MODE_OUTPUT_PUSH_PULL HW_GPIO_FUNC_COEX_SMART_ACT); < br / > hw_gpio_set_pin_function (HW_GPIO_PORT_3, HW_GPIO_PIN_2, HW_GPIO_MODE_OUTPUT_PUSH_PULL, HW_GPIO_FUNC_COEX_SMART_PRI);

hw_gpio_set_active(3, 0);
hw_gpio_set_active(3, 1);
hw_gpio_set_active(3, 2);

..................
}

And I running ble_txstream command, I observed each pin. As a result, only Smart_Act turned high. ( I guess is that the state of smart_act, smart_pri is High).

What did I do wrong?