PWM duty

PWM output become high level between one cycle.

Thu, 2018-09-20 11:33--imaizumi.k

Hello Dialog support team,

我想改变PWM责任力学ic(using Timer2).
There is phenom that PWM output become high level between one cycle.
I attach snapshot of PWM output.

I read "Figure 48: Timer 2 PWM Block Diagram" in DA14580 datasheet.
I think that this phenomenon is caused by a comparator of DUTY.
When T2_DUTY_CNTR equal PWM2_DUTY only, PWM output become Low level.
But when PWM2_DUTY set a value less than T2_DUTY_CNTR, PWM output keep High level between one cycle.

I think this phenomenon is occurring in the attached snapshot

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