Hi,
my DA7217 data spec version is 3.1. I have a few questions regarding the register settings:
1. Page 61: for the PLL, Table 47 indicates that it needs to set register 0x27 bit 3:2. However, pll_indiv bit in register 0x91. So I suspect table 47 is wrong
2. Page 115: I suspect Table 163 bit 3 is wrong. According to MIXIN_2_CTRL, this MIXIN_1_CTRL bit 3 should be mixer enable not amplifier enable. the amplifier enable bit is bit 7.
3. Should I configure all the registers first before setting ACTIVE mode bit? I got a sample register setting from you and the ACTIVE bit is set in the first line. I wonder if the audio data could be immediately sent out even before I complete the codec register initialization.
4. Does DA7217 care about the order of configuring the registers? In other words, should I configure some registers first before setting others?
Thanks,
Jimmy
1. Page 61: for the PLL, Table 47 indicates that it needs to set register 0x27 bit 3:2. However, pll_indiv bit in register 0x91. So I suspect table 47 is wrong
Yes this is register 0x91 for selecting the MCLK value.
2. Page 115: I suspect Table 163 bit 3 is wrong. According to MIXIN_2_CTRL, this MIXIN_1_CTRL bit 3 should be mixer enable not amplifier enable. the amplifier enable bit is bit 7.
Yes this is a mixer enable.
3. Should I configure all the registers first before setting ACTIVE mode bit? I got a sample register setting from you and the ACTIVE bit is set in the first line. I wonder if the audio data could be immediately sent out even before I complete the codec register initialization.
你需要写t系统活跃he registers. I would mute the audio channels as your are setting up if this is a concern.
4. Does DA7217 care about the order of configuring the registers? In other words, should I configure some registers first before setting others?
Not particularly however I would do System Active, Followed DAI/PLL (Clock Setup) and then Audio Path.