I'm playing with GreenPAK designer and created the simple circuit that I have attached (Is it not possible to attach a .gp5 file?). I'm using GreenPak5 Designer V6.21.
My goal with this "Hello World" project was simply to make the counter spit out a pulse every second.
I've tried various configurations and in the sim I can see OSC0 clock signal, but nothing out the other side of the CNT0 block.
I'll first assume the issue is with my lack of knowledge, and then I'll ask what I need to do to get this simple design to simulate? Any help would be appreciated!
Kind Regards to all.
Attachment:
Device:
Device Number:
SLG46537V
rtlongdon,
Thanks for your question,
Could you send me the design file, please send the file to zip-folder and attach here. I will help you to finish your project.
Best regards,
olehs
Thanks for taking a look!
rtlongdon,
Thanks for sharing the the design, I fixed it, please see the attachement . Counter was counting UP, that's why you didn't see signal on its output.
Note: it is more convinient to change OSC dividers in CNT/DLY properties, than use Ext. Clk.and take the same clock from OSC, since designer will show you typical counter time.
Best regards,
olehs
rtlongdon,
Thanks for sharing the the design, I fixed it, please see the attachement . Counter was counting UP, that's why you didn't see signal on its output.
Note: it is more convinient to change OSC dividers in CNT/DLY properties, than use Ext. Clk.and take the same clock from OSC, since designer will show you typical counter time.
Best regards,
olehs
Well I humbly thank you and I'll continue down the path!
Have a great day :)
rtlongdon,
My pleasure