Sequence of UART Low Level Driver

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nigelyang
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Sequence of UART Low Level Driver

Hi Dialog,

因为某些原因,我不能使用UART专r to implement UART communication. So how to implement UART function by UART LLD(hw_uart.c)? Is there any complete example sequence or document to reference?
thanks for your help.

Device:
PM_Dialog
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加入:2018-02-08 11:03
Hi nigelyang,

Hi nigelyang,

Could you please share what you are trying to accomplish and which your problem is? We highly recommend the usage of adapters for accessing hardware peripherals because not only provide access to the peripheral, but also make sure that other tasks which are currently accessing it, suspend their operation until the peripheral is once again released. So you don't have to worry if another task tries accessing the same peripheral at the same time. Also, when using UART adapters and sleep mode configuration, before the Power Manages will power of the chip, the adapters will check if there is pending UART functionality, and if yes the sleep will be delayed until the UART peripheral complete the transaction. .I strongly suggest you have a look at chapter 12.3.1 The UART adapter example of theUM-B-044 User Manual: DA1468x Software Platform Reference (HTML)from our support portal. Please, try this example and get back to me if you have any follow-up question or if your issue has not been fixed yet.

Thanks, PM_Dialog

nigelyang
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Last seen:2 weeks 11 hours ago
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Hi Dialog,

Hi Dialog,

My target is to let TX pin of UART become Low state in hibernation mode( because the current of hibernation mode will become higher, from 3uA to 9uA ). But the TX pin is default High state (HW_GPIO_MODE_OUTPUT_OPEN_DRAIN) if using UART Adapter, even in hibernation mode. I plan to use LLD to implement the UART function what I want and config the UART TX pin to be GPIO (to be low state) after finishing UART communication. If It is not good idea, please guide me how to use UART adapter to achieve my target. thanks

PM_Dialog
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Hi nigelyang,

Hi nigelyang,

Could you please try to test the hw_gpio_configure_pin() function after finishing UART communication and se the Tx GPIO to low? Also be aware that since you are using HW_GPIO_MODE_OUTPUT_OPEN_DRAIN configuration, you will not see difference in power consumption when the device enters the hibernation mode.

Thanks, PM_Dialog

nigelyang
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Last seen:2 weeks 11 hours ago
加入:2018-03-20 08:24
Hi Dialog,

Hi Dialog,

1. sorry for my writing mistake , it should be HW_GPIO_MODE_OUTPUT_PUSH_PULL when I got the higher current at hibernation. However, if my configuration is
HW_GPIO_MODE_OPEN_DRAIN, the current is normal. Why ?

2. if I using HW_GPIO_MODE_OPEN_DRAIN configuration, the TX pin will become high state after going to extended sleep mode; but keep stay in Low state after going to hibernation mode.
why ?

thanks for your help.

PM_Dialog
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Hi nigelyang,

Hi nigelyang,

In open drain configuration, there is one MOSFET that drives the GPIO to zero and if you would like to drive the ii into logic 1, you should put a pull-up resistor externally. In push-pull configuration, there are two MOSFETs, so the GPIO can be drive either to logic 0 or to logic 1. That’s why the current consumption is normal in open-drain configuration. In hibernation mode, all the blocks are closes exept from the WKUP controller, so that’s why the GPIO has the default value. Regarding the Tx, if I am able to understand correctly, this behavior is normal, because the transaction from 1 to 0 signals the start bit, and the transaction from 0 to 1 signals the stop bit.

Thanks, PM_Dialog