Hi,
I am trying to wire up some input pins to DFFs and the DFF outputs tied to an OR gate. I have noticed different behaviour depending on the input pin that is used. The DFFs behaves as expected when connected to PIN 2 dedicated input pin. However if I connect a DFF to any of the bidirectional IO pins the DFF does not repsond properly. I have the DFF reset tied to an input pin. If I remove the DFF, and connect directly to the OR gate, it responds to the PIN inputs correctly. I am using Greenpak Design 6.22 (build 006) and the Advanced Developement Platform with the SLG46867M.
Thanks
Device:
Device Number:
SLG46867M
Hi pwm80211,
Thanks for your activity!
Could you send me the design, where the issue was detected? Thanks!
Best regards,
olehs
Here it is.
pwm80211, Thanks for your design.
I found that both DFFs have different property Active level for RST/SET. The first one configured as "Low level", the second one is configured as "High level". This means that PIN5 enables only DFF8 when is HIGH meanwhile DFF12 is in the reset state, and vice versa when the PIN5 is LOW DFF12 is active, but DFF8 is in the reset state. This not the issue of silicon, but an additional feature of the DFF block. Please try to configure both DFFs as "Low level" and they will work as expected.
Best regards,
Oleh Sapiha
pwm80211, Thanks for your design.
I found that both DFFs have different property Active level for RST/SET. The first one configured as "Low level", the second one is configured as "High level". This means that PIN5 enables only DFF8 when is HIGH meanwhile DFF12 is in the reset state, and vice versa when the PIN5 is LOW DFF12 is active, but DFF8 is in the reset state. This not the issue of silicon, but an additional feature of the DFF block. Please try to configure both DFFs as "Low level" and they will work as expected.
Best regards,
Oleh Sapiha
Thanks,
I must not have hit the apply button.
pwm80211,
Please let me know if you have any further questions about GPAK and its blocks.
Best regards,
Oleh Sapiha