Hello,
My design involves 12 3-state buffers to be implemented. I am quite new to Greenpak and I didn't find 3-state buffers in the doc. I only find that 3-state buffers are integrated in the Pins.
However, my design involves 5 3-state outputs going into an OR Gate (LUT), for instance.
Is it possible to route the output of a 3-state buffer to an internal LUT or generally route it internally? Or do I have to go out of the chip through the Pin 3-state and back in through another Pin? I would run out of Pins then.
If this information is somewhere in the docs, please point me to it! Thank you.
(I think the concept of a 3-state buffer is clear, like verilog
assign output = enable ? input : 1'bz;
)
Thanks so much!
Christoph
Device:
Device Number:
SLG46533
Hi Christoph,
unfortunately, no there is no possibility to implement a tri-state buffer internally just using the PIN as the buffer. I'm wondering why do you need tri-state outputs if then they connected to an OR gate? Could you please provide this part of the schematic diagram for better understanding your requirements? Hope it can be replaced by muliplexer.
Thanks and regards,
Pavlo
Hi Pavlo, thanks for your quick reply. I have attached a schematic. It is a bit quirky as I just have powerpoint here.
This Schematic shows 2 in/outs D1 and D2 on the right side. In fact, I will have 5 that are connected just as 1 and 2 are now.
If I need more than one Greenpak to implement this and not only one, it would probably still be advantageous over other solutions, and therefore ok. But ideally I would like to implement it with one IC only.
Could you take a look if and how I could implement it using Greenpak? Thanks
Hi Christoph,
谢谢你的图表。请参阅the attached file. I created the reference design for you using SLG46533.
Hope it helps you start.
Best regards,
Oleh