How to implement a tri-state buffer

Hello,

My design involves 12 3-state buffers to be implemented. I am quite new to Greenpak and I didn't find 3-state buffers in the doc. I only find that 3-state buffers are integrated in the Pins.

However, my design involves 5 3-state outputs going into an OR Gate (LUT), for instance.

Is it possible to route the output of a 3-state buffer to an internal LUT or generally route it internally? Or do I have to go out of the chip through the Pin 3-state and back in through another Pin? I would run out of Pins then.

If this information is somewhere in the docs, please point me to it! Thank you.

(I think the concept of a 3-state buffer is clear, like verilog

assign output = enable ? input : 1'bz;

)

Thanks so much!

Christoph