SLG46826 lock itself after erase

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Last post
Mon, 2019-09-16 08:06
#1
joe.ye@oa.com.au
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SLG46826 lock itself after erase

Hi,

I try to program the SLG46826 chip in circuit with microcontroller. The SLG46826 chip has not programed with the factory I2C address 0x08.

However, after I erase some of the page like page 0xc0 (the page can be used to change I2C address setting), the chip locked itself with all register value chagne to 0xff (including the page 0xe0).

The attached file shown the action I did and the response from the chip:

1. Read from page 0xc0, value are normal (I2C address 0x08)

2. Erase page 0xc0

3.重置芯片

4. Try read from page 0xc0 with I2C address 0x08, reading fail as expected

5. Read from page 0xc0 with I2C address 0x00. All register values change to 0xff

I didn't show the value in page 0xe0 in the attachement, but all register values changed to 0xff as well which locked the chip with write proteciton.

Could you advise what may cause the issue?

Thank you!

Best regards,

Joe

Attachment:
PDF iconSLG46286 LOCK AFTER ERASE.pdf
Device:
DA14580
Device Number:
SLG46826
Mon, 2019-09-16 16:13
pavloZ
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Hi Joe,

Hi Joe,

你能确认你的我吗2C protocol uses restart (green highlighted in attachment) scenario?

Thanks for your question!

Attachment:
PDF iconrandom read.pdf
Mon, 2019-09-16 17:18
pavloZ
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One more question:

One more question:

what code do you have in brackets (please see attached)?

Thanks and regards,

Pavlo

Attachment:
PDF icon826_code.pdf
Tue, 2019-09-17 00:27
joe.ye@oa.com.au
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Hi PavloZ,

Hi PavloZ,

Thank you for your reply.

I can confirm my I2C protocl uses restart.

This is not our first project with SLG46826. We have erase and program the chip in circuit in production before in a different circuit. Although we also see the chip may lock itself during program, it happens quite rarely.

For the PN number, as the chip is in circuit, it may take me a while to figure out how to read it out. And do you mean some batches of this chip can easily lock itself?

Thank you!

Best regards,

Joe

Tue, 2019-09-17 02:48
joe.ye@oa.com.au
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Hi PavloZ,

Hi PavloZ,

The code in the bracket is 0x1 as attached.

Best regards,

Joe

Attachment:
PDF icontmp.pdf
Tue, 2019-09-17 08:37
joe.ye@oa.com.au
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Hi PavloZ,

Hi PavloZ,

I have a more detailed looking today. The NVM is acutally not locked.

Sometimes the value will load successfuly from NVM so the chip working properly, but other times the chip is not properly configured with the value in NVM so the reading from Register Data Configuration (A10=A9=A8=0) are all 0xff.

Do you have any clue what may cause it internally or externally?

Thank you!

Best regards,

Joe

Tue, 2019-09-17 15:19
pavloZ
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Hi Joe,

Hi Joe,

still have no idea what is the reason of that fault.

What is the supply voltage of the chip during data transfer?

Could you please take logic analizer waveform of that communication?