fail with slg46620V SPI encoder counter 16 bit up/down

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ivnn
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fail with slg46620V SPI encoder counter 16 bit up/down

Hi

Is it possible to inmplement an example "Quadrature Encoder Counter with SPI Bus Interface AN-CM-277" with slg46620V instead of slg46140???

I try the same one design with slg46620v but have an issue with up/down HIGH 8 bit counter (carryout doesnt work after LOW 8bit counter is overflow)
Could anyone help lil bit with design?

Device:
Device Number:
slg46620V
ivnn
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need help

need help

pavloZ
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Hi Ivan,

Hi Ivan,

pleased of your interest in our products.

Yes, it seems that the encoder design can be implemented on SLG46620.

Could you please share your test design instead of pdf file? It's much easy to find the issue using .gp file.

Thanks and regards,

Pavlo

ivnn
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Hi

Hi

seems I found an issue!

CNT2/DLY2/FSM0 (14 bit counter) generate overflow (carryout pulse) only when it rich 16383 value and dont working with custom "Counter data" value 255 or etc

pavloZ
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Hi Ivan,

Hi Ivan,

FSM counts to 16383 and then resets to custom "Counter data" value (e.g.255) during count "UP" and from custom "Counter data" value to zero when count "DOWN"

pavloZ
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One more thing, you can swap

One more thing, you can swap those FSMs (8-bit and 14-bit) if it the reason of issue. Try to place them exactly as in the appnote.

ivnn
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but slg46620 has only one

but slg46620 has only one 14bit counter FMS in matrix_0 and one 8bit FSM counter in matrix_1,

so i think the only one way to have 16 bit counter is to buy slg46140 with 2 8bit counters FSM

pavloZ
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Hi Ivan,

Hi Ivan,

no, because SLG46140 has the same two FSMs 8bit and 14bit. You just have to swap FSM0 and FSM1 in your SLG46620 design to place them exactly as in SLG46140 example. There are internal interconnections between matrixes, please use them for swap.

ivnn
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thx交换矩阵的帮助in my

thx交换矩阵的帮助in my case

ivnn
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Hi PavloZ,

Hi PavloZ,

I am very interested in your product line, thx for response

this is my latest test design with encoder in .gp file, so please check it