Hi,
I have been configuring various parts with three LUTs configured as invertors each connected to pins with schmitt trigger inputs and 1x outputs.
当我在众所周知的配置中使用这些Schmitt逆变器作为振荡器时（从输入到输出的10k电阻，输入输入的100pf电容器）I
观察大量抖动，振荡器之间的交互和高电源电压（> 3V）不稳定（具有20MHz输出）。我也试过了
with the SLG46620. The problems are less with two oscillators but even one oscillator of this form has a jittery output.
I followed the usual decoupling and shielding practices and compared results with the same board substituting a CD40106.
Is there internal crosstalk between power rails and schmitt inputs? This guess is from observations when I select 2x outputs and the problems are worse.
Device:
Device Number:
SLG46826
嗨Adrian，我们无法保证any specs using digital I/Os and blocks for generating some analog signal. Please refer to the datasheet for detailed data. For example: propagation delay pin to pin digital input with Shmitt to 1x push-pull at 3.3V is 19/22 ns rising/falling which is pretty close to 20MHz signal period even without internal logic. You can use internal ring oscillator to receive 25MHz instead. As for crosstalk it could be caused by pcb layout, bypass capacitor placed too far etc.
Thanks. My design follows oscillator ideas suggested by Silego app. notes where digital elements are used to generate analog signals especially AN-CM-233 which uses 3 pins and the low-voltage digital input option and an external RC network to make Pierce oscillators. Does that design also fall under the "no specs guaranteed" rubric? I was trying to build variable oscillators using only two pins so I avoided that particular solution (as it uses 3 pins total) and also can't use the fixed built-in oscillators. The datasheet specs for the schmitt trigger have very large margins for the DC thresholds and hysteresis - presumably because of temperature and process variations. There are no dynamic specifications so it is hard to to know anything about how much jitter will be introduced into signals acquired via the schmitt trigger (or the other inputs for that matter). This would apply to more common applications of schmitt triggers as well as the oscillators I am attempting. Thanks for the analysis of the pin/pin delay time. Now it would be interesting to understand where that high frequency feedback path comes from. I have tried to eliminate all the pcb layout and bypass capacitors issues by battery powering and deadbug building over a groundplane. I am still leaning towards an internal crosstalk path, e.g., ground bounce or switching noise. It is also possible that there is a temporary current surge around the schmitt trigger generated by the two adjacent, non-schmitt trigger inputs handling slow moving signals. This would depend on whether the enable logic disables the input stage of those, the output stage or is done with pass transistors which I can't determine from the datasheet.
我只是找到了一个helpful warning against what I am attempting in AN-1150 "Note that the inverter component could have been implemented inside the GreenPAK5; however, significant coupling between the system’s input and output pins was observed, and so the capacitor voltage had to be buffered by an external inverter." I have seen this coupling wherever on the package I move the output pin so I would perhaps clarify that statement by saying "significant internal coupling between the system's input and output was observed". Presumably such coupling isn't present when analog comparators are used to make oscillators, the subject of several other app. notes. That points to the pin logic as the locus of the coupling as the comparators are part of the low voltage core powered by an internal regulator.
嗨阿德里安，非常感谢your interest in our products.
Could you please clarify what exactly data do you need?
The input capacitance for the SLG46620 would be helpful. They are on the datasheet for the SLG46824.
It would be great to also have the pin inductance which varies a lot with package. This would help decide which package to use (QFN or TSSOP). This
is discussed herehttp://www.ti.com/lit/an/szza038b/szza038b.pdf.in section 2.5.1 .
Volp (ground bounce) for 1x 2x and 4x outputs at various power supply values and load conditions.
Consistent guidelines to minimize jitter when acquiring external signals (digital or analog) using the Low Voltage Digital Input/Regular Digital Input/Schmitt Input/Comparator input modes. As I mentioned there are hints of challenges in various application notes but maybe I missed some useful guidelines.
Hi Adrian,
I have spoken with my managment, and we do not have the necessary resources available to define and characterize the additional datasheet parameters that you have requested.
You may suppose that the same package has quite similar range of capacitance/inductance on its pins. Thanks.
谢谢你的快速响应。我现在可以继续到我的下一个项目。