Hi
我正在使用额外的外部3.3V转换器进行DA9063设计。
我用简化的电源树和时序图添加了一个附件。
The external 3.3V DC/DC Converter has an Enable and a Power Good Signal.
我希望DA9063启动3.3V启用信号后启用，等待3.3V PG信号。
After that the DA9063 should start with his own Power Sequencing.
When the 3.3V PG Signal is lost the DA9063 should make a reset and sould restart as before.
Also the 3.3V Regulator should be disabled and restartet again.
To get to this behaviour I planned to use a GPIO as the 3.3V Enable signal and the System_EN is connected to the 3.3V PG Signal.
I thought it would be the right decision to enable the GPIO 3.3V Enable Signal in Sequencer Time Slot 0.
So the DA9063 has to wait until the PG Signal is set and after that starts with his power sequence.
And when the 3.3V Supply fails the PG Signal disables the System_EN which creates a reset.
Questions:
Is this the right way to realise my intended behaviour?
如果在重置插槽0：3.3V启用信号将切换3.3V电源也是重置的
Should the 3.3V Enable GPIO "Fall Slot" defined as Slot 1 or is Slot 0 the right one?
最好的祝福
亚历克斯
Hello Alex,
以您描述的方式转动DA9063 PMIC;我们只需要有关重新启动的更多信息：
亲切的问候，
艾略特德克斯特
Hi Elliott
Thanks for your reply.
1. Yes I also intended to use GPIO8 and GPIO9. So we got the same idea
3. PG损耗可能是由于电源输出的短路引起的。我在脑海中有风景，在那里我在衡量板上的东西，无意中缩短了我的外部3.3V电源的输出。在这种情况下，DA9063的所有电源也应该关闭。这就是在3.3V电源导轨低于1.8V轨道的情况下，我们在董事会上获得了IC的电路板（从DA9063）
4.如果可能的话是一个快速关闭。
5.. Yes
6.. Toggle it's enable signal
7.. auto-boot mode
Regards Alex
Hi Alex,
3.. If the DA9063 loses its PG signal from the external regulator, the DA9063 will go into SYSEN mode and will not reset, the DA9063 will then wait for a SYS_EN signal. Regulators will still be turned on in this mode.
4.. A fast shutdown is possible, Register bit INT_SD_MODE, can either be set to normal or too fast. Fast will skip the sequencer and any dummy slots.
这可以通过GPIO设置为GPO或低电流LDO来实现。LDO可以设置为在0 V和所选电压之间切换。
7.. The DA9063 has an Autoboot setting.
亲切的问候，
艾略特德克斯特
Hi Elliott
我想我们可能互相理解。
数据表清楚地表明，当使用NRES_Mode活动的SYS_EN时，DEASED
DA9063将断电序列触发到待机模式中，并停用所有稳压器，没有XXXX_CONF断言
我认为你的意思是与答案3不同的东西。
也许从一开始：
I intended to connect the 3V3_EN to "Random GPIO" as example GPIO9 and use Connect the 3V3_PG to GPIO8/SYS_EN and configure it as SYS_EN
Problem : I have to set 3V3_EN before SYS_EN is present
Solution : Use Slot 0 to control (in this case) GPIO9
follow up problem : 3V3_EN never gets toggled so my intended behaviour is not satisfied.
我的问题是：我如何实现我的预期行为，也可以使用da9063来实现这一目标吗？
或者我必须设计一种实现这种行为的外部电路吗？
---
As an alternative i could use the feature from GPIO10 with a WAIT_STEP.
So I would use the autoboot mode and connect the 3V3_EN Signal to a random GPIO as example GPIO9 and also I would connect 3V3_PG to GPIO10.
Then I would start with GP_RISE4_STEP in Slot 1 and WAIT_STEP in Slot 2.
Problem : But When I get it right, then when I lost 3V3_PG signal nothing would happen.
so this time my main intention would be unsatisfied...
使用3关闭年代v3_pg信号为例ignal would be totally wrong because 3V3_PG will actively pull to gnd until the output voltage will reach 3.3V
---
I don't know. I think I overlook a basic feature which would implement my intended behavior.
But I don't find it in the datasheet
如果你能指向正确的方向，我会非常感激
Sincerely Alex
Hi Alex,
我认为这一混乱来自第一位，我假设您计划将3V3_EN连接到GPIO8 / SYS_EN和3V3_PG到GPIO9 / PWR_EN，如果GPIO9失去PG信号并切换PIN PMIC将进入SYS模式。您使用的是触发GPIO，它是外部稳压器的输出还是外部稳压器有GPIOS？
亲切的问候，
艾略特德克斯特
Hi Elliott
I made a PDF with our circuit.
您在顶部的3.3V稳压器和下面看（草案）DA9063（仅控制和GPIO的东西）
The 3.3V Regulator has en Enable signal with CMOS logic and a Power Good Signal which is an open drain circuit that pulls to GND when the output is not in 10% range of the intended output voltage.
我们还有一个未显示的5V主电源。
Intended behaviour:
1) DA9063 turns-on 3.3V Regulator before all DA9063 Supplies
2) DA9063 turns-off 3.3V Regulator when its going to Power-Down mode
3.) A PG_3V3 lost (PG_3V3 = GND) should trigger the DA9063 to go in Power-Down mode with fast-shutdown
4）任何DA9063电源的电源故障应触发3.3稳压器的关断和DA9063
我该为此做些什么？
Sincerely Alex
Hi Alex,
After viewing your schematic I can see two ways in which you can achieve the operation that you require. I think its best if we make use of the power sequencer, the signal from the DA9063 that enables the MP2147, can come from GPIO8 set as an output. The Step for GPIO8 can be set in the power sequencer before SYSTEM_END, this will toggle the MP2147 enable pin and then wait for the power good signal. The MP2147 will then toggle the DA9063s GPIO9 configured a PWR_EN input, after this is toggled the DA9063 will continue up the sequencer and enable all the other rails (LDOs, BUCKs, GPIOs…etc). In regards to your schematic this will mean you will have to swap your GPIO8 and GPIO9 rails. Does this make sense?
You have connected LEDs to GPIO10 and GPIO11, these pins can only sink 11 mA, is this enough current for your LEDs?
亲切的问候，
艾略特德克斯特
Hi Elliott
I made some test with the Development Board and I finally realized that I cant fulfill my requirements with the DA9063 alone.
在解决方案中，未启动3V3稳压器不会启动完全重置。
So I modified the circuit.
你在附件中看到它。
I added a driver with en output enable signal, so I can gate the PG Signal from my 3V3 Regulator
1）在启动shutdown_oe = vsys（以至于我不在bootloop中）
2) In System Domain I enable the EN_3V3 signal with GPIO8
3.) I use the PG_3V3 Signal as PWR_EN Signal.
4.) As first Step in Power Domain I pull SHUTDOWN_OE to GND
this enables the shutdown logic.
5）启用电源域中的所有其他电源。
通过这种修改，我应该能够满足我的所有要求。
Do you see any downside of this solution?
Also the question in the yellow note : Could I end up in a boot-loop, when I configure the GPIO10 as OD with Pull-Up and delete the external pull-up at the input of the 74LVC1G125?
Because the OTP Settings are loaded after exiting RESET Mode and I assume if nShutdown is pulled the hole time, the DA9063 stays in the Reset Mode?
PS: no the LED's where a copy paste artifact
Hi Alex,
我会在这里与申请团队交谈。当你说你有一个开发板时，您是否使用了对话DA9063评估板（44-179-176-05-B），带有子板或者您使用的是您使用的定制板，并您下载了DA9063 GUI吗？
亲切的问候，
艾略特德克斯特
Hi Elliott
Motherbaord：44-179-176-05-B
Daughterboard: 44-179-176-07-B
With the delivered SW: DA9063B_3v1 : 3.1.0.458 SVN
Regards
亚历克斯
Hello Alex,
What do you intended to use to pulldown the SHUTDOWN_IO? Im just following the logic of the driver.
亲切的问候，
艾略特德克斯特
它在PDF中绘制：GPIO10
用作GPO开漏。
The logic behind it:
- 3V3调节器将3V3_PG拉到GND，直到3V3输出达到3.3V。
- 所以我必须掩盖nshutdown信号。否则DA9063将无法启动
- DA9063 enables the 3V3 Regulator with 3V3_EN = OD not pulling (external Pull Up to VSYS)
- When the 3V3 is started by the DA9063, I will pull GPIO10 to GND to enable the 74LVC1G125. At that Moment 3V3_PG is = VSYS
- When now a 3V3 Fault condition happens : 3V3_PG will get pulled to GND : The output of 74LVC1G125 is getting pulled to GND and so nShutdown will get asserted => Reset
Hi Alex,
原理图和逻辑很好，应符合您所需的操作。要回答您之前的两个问题：
1）GPIO10的上拉可用于将线路拉到3.3 V，但是当驾驶员需要将OE拉到低电平时，必须清除该位，这将有效地臂复位。这有意义吗？
2) The DA9063 should not stay in reset mode because of the continuous assertion of the nSHUTDOWN in this system, the nSHUTDOWN is edge triggered and not level.
亲切的问候，
艾略特德克斯特
Hi Elliott
1) In my eye's yes. The OE~ is negative active.
2) I tried it out with the Development Board.
It does not restart, when I pull the nShutdown signal to GND.
I have to release the signal so that the DA9063 does start up again.
Your answer is wrong. ಠ_ಠ
I found an interesting section int the Datasheet:
"Other RESET triggers such as via port nOFF or nSHUTDOWN need to be released before the DA9063 can move
从重置到PowerDown模式“
I'm done with the schematic and we will peer review it in our dev. group.
please close this thread.
Hi Alex,
我们找不到”等复位触发器通过port nOFF or nSHUTDOWN need to be released before the DA9063 can move
从重置到PowerDown模式“in the current data sheet 2v1. We can find:
"● Forced from the host processor (non-interruptible) by:
○断言港口NSHutdown（下降沿）
○ writing to register bit SHUTDOWN”
您是否使用了最新的数据表？我们通过持有NSHutdown低电平且DA9063启动了配置。
2) It sounds like you have attempted to use nSHUTDOWN after power up and that would require nSHUTDOWN to be released. In our test nSHUTDOWN was held low (GND) at application of power to the system.
亲切的问候，
艾略特德克斯特
Hi Elliott
1) Its on the next page as your copied text.
Page 70 DA9063_2v1 23-Mar-2017
2）当然我在上电后使用NSHutdown。这是我试图解释的用例。
==> A failure of the external 3V3 Voltage Regulator should force a reset of the DA9063 otherwise IC's in the board get damaged.
之后，正常系统重启。
当然，此时的DA9063仍然来自5V0稳压器的VSYS。
I tried several times to explain what I want to achieve.
When I'm not explicit enough... fine. English is not my native language
但是让我们仔细讨论我已经浪费了太多时间了。
Regards
亚历克斯