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SLG46721
SLG46721
格林帕克™ Programmable Mixed-signal Matrix
格林帕克在线商店
18-GPIO, 4 ACMPs, 18 LUTs (max.), 7 CNT/DLY (max.), 6 DFF/LATCH (max.) and other Macrocells
The SLG46721 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46721. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.
Macrocells Overview
- Four Analog Comparators (ACMP);
- 两个电压参考(VREF);
- 九个组合查找表(LUT):
- 两个2位LUT;
- 七个3位luts;
- 九个组合功能宏小区:
- Four Selectable DFF/Latch or 2-bit LUTs;
- 两个可选择的DFF /闩锁或3位LUT;
- 一个可选管延迟或3位LUT;
- 两个可选择的CNT / DLY或4位LUT;
- Five Counter / Delay Generators (CNT/DLY):
- One 14-bit delay/counter;
- 一个14位延迟/计数器,外部时钟/复位;
- Three 8-bit delays/counters;
- 管道延迟 - 16级/ 3输出(组合功能宏子的一部分);
- 可编程延迟;
- 其他逻辑功能:
- 2 Inverters;
- 两个reglitch过滤器;
- RC Oscillator (RC OSC).
特征
- 逻辑和混合信号电路
- Highly Versatile Macrocells
- Read Back Protection (Read Lock)
- 1.8 V (±5%) to 5 V (±10%) Supply
- Operating Temperature Range: -40°C to 85°C
- RoHS Compliant / Halogen-Free
- 20-pin STQFN: 2 x 3 x 0.55 mm, 0.4 mm pitch
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包
圣QFN-20 (2.0 x 3.0 mm)
资源
数据表
- SLG46721数据表(1.11 MB)
Errata sheets
- SLG46721勘误表(631.71 KB)
申请笔记
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