SLG46538-A

Dual supply, 17-GPIO, 4 ACMPs, 8-State ASM, I2C, 17 LUTS (max.), 7 CNT/DLY (max.), 8 DFF/LATCH (max.) and other Macrocells

The SLG46538-A provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46538. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The additional power supply (VDD2) on the SLG46538 provides the ability to interface two independent voltage domains within the same design. Users can configure pins, dedicated to each power supply, as inputs, outputs, or both (controlled dynamically by internal logic) to both VDD and VDD2 voltage domains. Using the available macro-cells designers can implement mixed-signal functions bridging both domains or simply pass through level-translation in both High to Low and Low to High directions.

Four Analog Comparators (ACMP);

Two Voltage References (Vref);

Nineteen Combination Function Macrocells:

• Three Selectable DFF/Latch or 2-bit LUTs;
• One Selectable Continuous DFF/Latch or 3-bit LUT;
• Four Selectable DFF/Latch or 3-bit LUTs;
• One Selectable Pipe Delay or 3-bit LUT;
• One Selectable Programmable Function Generator or 2-bit LUT;
• Five 8-bit delays/counters or 3-bit LUTs;
• Two 16-bit delays/counters or 4-bit LUTs;
• Two Deglitch Filters with Edge Detectors;

State Machine:

• Eight States;
• Flexible input logic from state transitions;

Serial Communications:

• I2C Protocol compliant;

Pipe Delay – 16 stage/3 output (Part of Combination Function Macrocell);

Programmable Delay;

One Inverter;

Two Oscillators (OSC):

• Configurable 25 kHz/2 MHz;
• 25MHz RC Oscillator;

Crystal Oscillator;

Power-On-Reset (POR);

Eight Byte RAM + OTP User Memory:

• RAM Memory space that is readable and writable via I2C;
• User defined initial values transferred from OTP.

Logic & Mixed Signal Circuits

Highly Versatile Macrocells

Read Back Protection (Read Lock)

1.8 V (±5%) to 5 V (±10%) VDD

1.8 V (±5%) to 5 V (±10%) VDD2 (VDD2 ≤ VDD)

Operating Temperature Range: -40°C to 85°C

RoHS Compliant / Halogen-Free

AEC-Q100 Grade 1

Personal Computers and Servers

PC Peripherals

Consumer Electronics

Data Communications Equipment

Handheld and Portable Electronics

In-Vehicle Navigation

Infotainment

Advanced Driver Assistance Systems (ADAS)

Automotive Display Clusters

Body Electronics

SLG46538-AP: TQFN-20 (3.5 x 3.5 x 0.75 mm, 0.5 mm pitch)

The product ID suffix indicates the package style.