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电源序列器

电源序列器

专为独特系统定制的电源定序器

成功供电系统可能很棘手。所以可以推送一个。时间，事件顺序和功率水平需要正确的系统功能和稳定性。使用电源定序器还可以防止不必要的电流绘制而设计的部分静置，等待供电的先决条件系统。一些FPGA可能需要十多个轨道，如果使用离散元件测序，则可以引入额外的电源和电路板空间开销。

使用GreenPak™系列设备，使用最小的电源和电路板空间，易于在极小的区域内实现自定义电源序列仪设计。当与微小的超低r配对时DSONGreenFET™ Integrated Power Switch, power sequencing with Dialog is an incredibly efficient solution.

通常在单个系统中的各种组合中，功率排序的一些常用方法包括：

  • 修复时机
  • Power Good
  • I2C承认
  • Voltage Sensing

GreenPAK Benefits for Power Sequencing

  • 系统稳定性
    • GreenPAK is Zero Code - Implementing features in hardware ensures stability
    • GreenPAK可以集成许多组件，确保更少的故障点
  • 能量消耗
    • GreenPak是低功耗 - 可以在没有破坏电源预算的情况下连续运行
  • Size
    • GreenPak小于1.2mm²
  • 灵活性
    • GreenPak GPIO是可配置的 - 上拉/下式电阻，推拉，开漏等。
    • GreenPak GPIO路由灵活 - 确保PCB路由中的复杂性最小
    • GreenPak集成了许多常见组件 - 生成定制时序和逻辑，以满足许多电源序列设计的要求

固定延迟测序

One method for sequencing multiple sub-systems is to allot a fixed amount of time for each start-up sequence. This is appropriate for systems which do not feature a Power Good signal. Finding a discrete solution with the exact delay timings needed can take hours, but with GreenPAK’s configurable logic and timing resources, developing a custom system is easy.

Example 1. Fixed Delay Sequencing

关键设计考虑因素

  • Delay Time – Using GreenPAK’s internal oscillators and CNT/DLY blocks, it is possible to address a wide range of timing requirements
  • 在信号极性上，GreenPak可以配置为使用集成的逆变器和LUT输出主动高或低

Example 1. GreenPAK Implementation

示例1.时序图
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Power Good

Many ICs have the ability to produce a Power Good (PG) signal once the respective systems have finished their start-up routine. This can be useful in systems where start-up time is not fixed and may depend on multiple variables.

例2.用电源进行排序

关键设计考虑因素

  • ON and PG Signal Polarity – GreenPAK can be configured to output active high or low using integrated inverters and LUTs.

Example 2. GreenPAK Implementation

例2。时序图
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I2C承认

Another option in programmable systems with I2C is to send a command to the power sequencer, in this case GreenPAK, to let it know start-up was completed successfully. Using GreenPAK's I2C virtual inputs, it is easy to treat an I2C command just like a digital Power Good signal.

Example 3. Power Sequencer with I2C Acknowledge

关键设计考虑因素

  • I2C Speed – GreenPAK I2C supports up to 400 kHz
  • I2C地址 - GreenPak最多可包含16个独特的I2C地址

Example 3. Timing Diagram

示例3. GreenPak实施
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Voltage Sensing

To ensure system stability, many SOCs, DSPs, and FPGAs require a minimum voltage for startup. Monitoring the power level of a rail can be done simply using GreenPAK’s configurable analog comparators.

Example 4. Power Sequencer with Voltage Sensing

关键设计考虑因素

  • 过电压/欠压阈值 - 电源公差变化，但使用GreenPak具有集成ACMPS，可在广泛的用户指定条件下进行可靠的排序
  • Time Sensitive Voltage Limits – Varying periods of voltages outside the limit may be tolerable for some systems. GreenPAK’s configurable CNT/DLY blocks can be used to reject reset events below a wide range of time thresholds
  • 滞后 - 标称电压要求可以包含滞后。GreenPak的ACMP可以配置25,50或200 mV滞后

示例4.时序图

Example 4. GreenPAK Implementation

GreenPak开发工具和软件

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